1. Field of the Invention
Example embodiments relate to an isolation layer structure, a method of forming the same and a method of manufacturing a semiconductor device including the same.
2. Description of the Related Art
Semiconductor memory devices may include volatile memory devices, e.g., a dynamic random access memory (DRAM) device or a static random access memory (SRAM) device, and non-volatile memory devices, e.g., read only memory (ROM) devices, electrically erasable and programmable read only memory (EEPROM) devices, or flash memory devices. The flash memory devices may control input or output of data by channel hot electron (CHE) injection or Fowler-Nordheim tunneling (F-N tunneling).
Generally, a unit cell of the non-volatile memory device may have a stacked structure in which a tunnel insulation layer, a floating gate, a dielectric layer and a control gate are sequentially stacked on a substrate. A plurality of unit cells may be separated from each other by an isolation layer. Particularly, a trench may be formed on an upper portion of the substrate between the unit cells. An insulative material may be filled into the trench, and a heat treatment may be performed on the insulative material to form the isolation layer. During the heat treatment, the isolation layer may expand/shrink so that dislocations may be generated at a portion of the substrate adjacent to the isolation layer. Due to the dislocations of the substrate, electrical characteristics of the non-volatile memory device may deteriorate.